Memory capacitor in semiconductor device for DRAM cells - comprises conductively doped poly:silicon@ layers and insulating layer comprising capacitor dielectric adjacent to memory node of 2nd poly:silicon@ layer

摘要

A memory capacitor has (1) a conductively doped first polysilicon layer with a first and a second end, the first end making contact with a memory node connection of an access device and the second end being insulated from an adjacent conductive material by a dielectric; (2) a conductively doped second polysilicon layer adhering to the first polysilicon layer, forming a memory node plate of I-shaped cross-section; (3) an insulating layer comprising a capacitor dielectric adjacent to the memory node plate and extending the same distance as the latter except for regions for the contact point at its first end and the insulation at its second end; and (4) a conductively doped third polysilicon layer forming a cell palte which has an upper and a lower surface, and adjacent to and of the same extent as the capacitor dielectric layer. The doped polysilicon is pref. produced by gas-phase deposition, as are all the dielectric layers. The capacitor dielectric layer is selected form nitrides, oxidised nitrides, Ta2O5, oxidised Ta2O5 and SrTiO3. USE/ADVANTAGE - Used in the mfr. of DRAM, VRAM and other stacked memory cell devices. Capacitor maximises the memory cell active surface in the prodn. of high-density DRAMs (an increase of 200% or more is quoted).