PURPOSE:To improve the date link processing reliability of a device which performs the termination processing of the X. 25 and X. 75 layers 2 by preventing the omission and the double feed of an I frame when a link is decided again after the occurrence of a fault. CONSTITUTION:A CPU 4 of a layer 2 processor 1 controls a layer 2 terminating circuit 3 to add the signal identification sequence numbers counted in a memory 5 for transmission of an I frame and to sample the signal identification sequence numbers added from a device of the opposite party for reception of the I frame. Then the CPU 4 receives a global address frame that designated a specific address from the device of the opposite party and then reads the signal identification sequence number out of an information field to sent again the I frame to which the read sequence number is assigned.
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