Multichannel multiplex data transmission controller with status memory - has branching signal lines for connecting peripheral memory to transmission processor with software-implemented upper transmission layer.

摘要

A central controller (3) reads, modifies and writes control and status information and transmission/reception data for a selected channel while controlling its transmission and reception data selectors (4,5) and number counter (6), data storage address counter (7), cyclic redundancy check and parity calculator (8), data multiplexer/demultiplexer (9) and address multiplexer (10). The information and data for each channel are stored in a peripheral memory (2) and, when a channel number is entered, the foregoing information is read, modified and rewritten sequentially. USE/ADVANTAGE - With sync. and high-level data link control protocols, transmission is accomplished with low hardware complexity.