首页> 外国专利> SEMICONDUCTOR STORAGE DEVICE, INTERNAL POWER SUPPLY VOLTAGE GENERATING CIRCUIT, INTERNAL HIGH VOLTAGE GENERATING CIRCUIT, INTERMEDIATE VOLTAGE GENERATING CIRCUIT, CONSTANT CURRENT SOURCE AND REFERENCE VOLTAGE GENERATING CIRCUIT

SEMICONDUCTOR STORAGE DEVICE, INTERNAL POWER SUPPLY VOLTAGE GENERATING CIRCUIT, INTERNAL HIGH VOLTAGE GENERATING CIRCUIT, INTERMEDIATE VOLTAGE GENERATING CIRCUIT, CONSTANT CURRENT SOURCE AND REFERENCE VOLTAGE GENERATING CIRCUIT

机译:半导体存储设备,内部电源产生电路,内部高压产生电路,中间电压产生电路,恒定电流源和参考电压产生电路

摘要

PURPOSE: To obtain a semiconductor storage device operating stably with a low power consumption. ;CONSTITUTION: This semiconductor storage is provided with an internal power source voltage generating circuit 4 generating first and second internal power source voltages by lowering an internal power source voltage. a Vpp generating circuit 5 generating a high voltage from an external power source voltage by a charge pumping operation and a Vbb generating circuit 3 generating a negative voltage from the external power source voltage by a charge pumping operation. The first internal power source voltage is applied to a control circuit 7 and a sense-amplifier driving signal generating circuit 6. The second internal power voltage is applied to a circuit 9 generating a bit equalizing/precharging signal. Even in the case the first internal power source voltage is made lower, the Vpp generating circuit 5 and the Vbb generating circuit 3 generate effectively and stably a prescribed internal high voltage and a prescribed negative voltage to generate a prescribed voltage from the external power source voltage. Moreover, since the voltage level of the bit line equalizing/precharging signal is higher than the first internal power source voltage, the equalizings/prechargings of bit lines can be performed at high speed.;COPYRIGHT: (C)1996,JPO
机译:目的:获得一种低功耗,稳定运行的半导体存储器件。 ;组成:该半导体存储器设有内部电源电压产生电路4,该内部电源电压产生电路4通过降低内部电源电压来产生第一和第二内部电源电压。 Vpp产生电路5通过电荷泵浦操作从外部电源电压产生高电压,而Vbb产生电路3通过电荷泵浦操作从外部电源电压产生负电压。第一内部电源电压被施加到控制电路7和读出放大器驱动信号生成电路6。第二内部电源电压被施加到电路9,以产生位均衡/预充电信号。即使在降低第一内部电源电压的情况下,Vpp产生电路5和Vbb产生电路3也有效且稳定地产生规定的内部高电压和规定的负电压,以从外部电源电压产生规定电压。 。此外,由于位线均衡/预充电信号的电压电平高于第一内部电源电压,因此可以高速执行位线的均衡/预充电。;版权:(C)1996,JPO

著录项

  • 公开/公告号JPH0831171A

    专利类型

  • 公开/公告日1996-02-02

    原文格式PDF

  • 申请/专利权人 MITSUBISHI ELECTRIC CORP;

    申请/专利号JP19940165614

  • 发明设计人 FURUYA KIYOHIRO;

    申请日1994-07-18

  • 分类号G11C11/407;G05F1/56;G05F3/24;G11C11/413;H01L27/04;H01L21/822;

  • 国家 JP

  • 入库时间 2022-08-22 03:56:05

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