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Method and system for performing propositional reasoning tasks by operating parallel processors

机译:通过操作并行处理器执行命题推理任务的方法和系统

摘要

Propositional reasoning is performed on a massively-parallel processor, with sets of element value combinations being handled by separate processing units. A host processor operates as a problem-solver, generating requests for propositional reasoning, and also operates as an interface between the problem-solver and the parallel processor. In response to a request that includes a formula, the interface provides one or more formulae such as justifications and class restrictions. The interface provides instructions to the parallel processor based on each of these formulae. The instructions based on each formula are provided so that the set of element value combinations handled by each processing unit is not divided or forked into two subsets until necessary. If possible, forking is avoided by forcing the value of an element to the only value consistent with the current formula. Furthermore, if no additional processing unit is available for forking, the current formula is kept on a queue of formulas, and the corresponding instructions are subsequently repeated. In this manner, the host processor orders the formulas into a sequence that reduces the number of processing units required. When necessary, a selected assumption is forced to one value to free processing units; its other value is considered subsequently by backtracking. Each element value is assigned one or more bit positions in each processing unit, but when the values in all the processing units are the same for a given element, its bit position may be reclaimed, to reduce memory requirements. The interface also responds to a request for results by sending instructions that use circuitry in the parallel processor to obtain a combined result from the processing units.
机译:命题推理是在大规模并行处理器上执行的,元素值组合的集合由单独的处理单元处理。主机处理器充当问题解决者,生成命题推理的请求,还充当问题解决者与并行处理器之间的接口。响应包含一个公式的请求,该接口提供一个或多个公式,例如理由和类别限制。该接口基于这些公式中的每一个向并行处理器提供指令。提供基于每个公式的指令,以使每个处理单元处理的元素值组合的集合直到必要时才被划分或分叉为两个子集。如果可能,可以通过将元素的值强制为与当前公式一致的唯一值来避免分叉。此外,如果没有其他处理单元可用于派生,则将当前公式保留在公式队列中,并随后重复相应的指令。以这种方式,主处理器将这些公式按顺序排列,以减少所需的处理单元数量。必要时,将选定的假设强制为一个值以释放处理单位;随后通过回溯考虑其其他值。在每个处理单元中为每个元素值分配一个或多个位位置,但是当给定元素的所有处理单元中的值相同时,可以回收其位位置,以减少内存需求。该接口还通过发送指令来响应对结果的请求,该指令使用并行处理器中的电路以从处理单元获得组合结果。

著录项

  • 公开/公告号EP0346128B1

    专利类型

  • 公开/公告日1996-09-04

    原文格式PDF

  • 申请/专利权人 XEROX CORP;

    申请/专利号EP19890305817

  • 申请日1989-06-09

  • 分类号G06F9/44;

  • 国家 EP

  • 入库时间 2022-08-22 03:48:12

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