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Finite field polynomial processing module for error control coding

机译:用于误差控制编码的有限域多项式处理模块

摘要

A single module for performing polynomial arithmetic operations over finite fields is provided in an error correcting system for correcting Reed-Solomon codewords with mixtures of errors and erasures in an optical disk storage. The module comprises two-dimensional register arrays, which serve as a working area to store initial data and intermediate results of the polynomial operations. A set of multiplier- adder units performs multiplication and addition operations under the data supplied from the register arrays based on finite field arithmetic over the Galois field GF(2.sup.8). A set of multiplexers routes the input data to the corresponding multiplier-adder units depending on the polynomial functions to be performed. In response to initial condition signals, a control system determines what polynomial functions are to be performed by the polynomial processing module and supplies the module with control signals to provide the data control in the register arrays and selection of the multiplexers.
机译:在纠错系统中提供了用于在有限域上执行多项式算术运算的单个模块,该纠错系统用于利用光盘中的错误和擦除混合来校正Reed-Solomon码字。该模块包括二维寄存器阵列,该二维寄存器阵列用作存储初始数据和多项式运算的中间结果的工作区域。一组乘法加法器单元基于Galois字段GF(2sup.8)上的有限域算术,在寄存器阵列提供的数据下执行乘法和加法运算。一组多路复用器根据要执行的多项式函数将输入数据路由到相应的乘法器-加法器单元。响应于初始状态信号,控制系统确定将由多项式处理模块执行哪些多项式功能,并且向模块提供控制信号以提供寄存器阵列中的数据控制和多路复用器的选择。

著录项

  • 公开/公告号US5642367A

    专利类型

  • 公开/公告日1997-06-24

    原文格式PDF

  • 申请/专利权人 MITSUBISHI SEMICONDUCTOR AMERICA INC.;

    申请/专利号US19940192909

  • 发明设计人 ROM SHEN KAO;

    申请日1994-02-07

  • 分类号G11C29/00;

  • 国家 US

  • 入库时间 2022-08-22 03:09:49

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