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A method of forming a semiconductor structure, a method of forming a multi-chip integrated circuit structure, a method of bonding an integrated circuit chip to a workpiece, an integrated electrical structure and a cube structure
A method of forming a semiconductor structure, a method of forming a multi-chip integrated circuit structure, a method of bonding an integrated circuit chip to a workpiece, an integrated electrical structure and a cube structure
A cube package of stacked silicon alumina chips has been disclosed. To package into a cube, metal transfers are added on the surface of the surface stabilization chip so that all surface electrical contacts are drawn to a common chip edge. The metal transfer layer is insulated from the surface of the chip and from adjacent needles in the stack structure by a polymo layer in which the dielectric constant coincides with the low dielectric constant and the stacked chips. An adhesive polymer layer is added to enhance adhesion between the first polymer layer and adjacent chips in the laminate structure, which is deposited at the wafer level and partially cured and fully cured when the needles are stacked to form a cube. do.
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