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Instruction swapping in dual pipeline microprocessor
Instruction swapping in dual pipeline microprocessor
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机译:双流水线微处理器中的指令交换
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摘要
An instruction swap is implemented in a dual pipelined microprocessor to make instruction flow smoother upon resource or structural conflicts in executing an instruction. Instructions are accessed in an even and odd pair with an even instruction proceeding an odd instruction. The accessed instructions are stored in Read/Decode registers for decoding and execution. The even and odd instructions are swapped in the registers and in execution when the preceding even instruction encounters an execution conflict or a branch.
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