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High-speed pattern generator

机译:高速码型发生器

摘要

PURPOSE:To generate an object pattern without a dummy time by switching a frequency division ratio of a frequency divider between 8 and 6 in real time when it is required to switch a parallel number such as a galloping pattern between 8 and 6 in real time. CONSTITUTION:The pattern generator is provided with a programmable counter 1 receiving a system clock and generating a clock 12 and a selection signal 13, n-sets of pattern generating circuits 2 operated at a period of the clock 12, a multiplexer 3 converting an output pattern of the n-sets of pattern generating circuits 2 into a time series pattern by using a selection signal 13 and outputting the result as a high speed pattern and a control memory 4 operated at a period of the clock 12 to control a frequency division ratio of the programmable counter 1.
机译:目的:当需要在8和6之间实时切换诸如舞动模式之类的并行数时,通过在8和6之间实时切换分频器的分频比来生成没有虚假时间的目标模式。组成:码型发生器配有可编程计数器1,该计数器接收系统时钟并生成时钟12和选择信号13,n组码型产生电路2在时钟周期内运行,多路复用器3转换输出通过使用选择信号13并将n个模式产生电路2的n个模式产生电路2的模式转换为时间序列模式,并将结果作为高速模式输出,并且以时钟12的周期操作控制存储器4以控制分频比可编程计数器1。

著录项

  • 公开/公告号JP2964644B2

    专利类型

  • 公开/公告日1999-10-18

    原文格式PDF

  • 申请/专利权人 ANDO DENKI KK;

    申请/专利号JP19900407196

  • 发明设计人 FUJEDA TAKANORI;

    申请日1990-12-10

  • 分类号H03K3/78;G01R31/28;

  • 国家 JP

  • 入库时间 2022-08-22 02:32:42

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