BUS-TO-BUS READ PREFETCH LOGIC FOR IMPROVING INFORMATION TRANSFERS IN A MULTI-BUS INFORMATION HANDLING SYSTEM

摘要

The present invention provides a method and system for improving data transfer between buses in a multi-bus computer system. The system of the present invention includes a system bus to which a slave device is connected, a peripheral bus to which a master device is connected, and a host bridge connecting these two buses. This system bus allows burst read transfer of data stored in the slave device, in which case a single address phase is followed by several data phases, where the first address corresponds to the indicated system bus address boundary. Peripheral buses are not address bounded, but rather allow burst read transfers starting at any address. The host bridge includes logic to decode the first address sent by the master device to determine whether the address corresponds to a system bus boundary. If the first address does not correspond to a system bus boundary, the logic initiates a first read prefetch nonburst transfer of the first data set stored in the slave device, starting at this first address and ending at the system bus boundary, Temporarily store this first data set in a buffer. The logic then initiates a second read prefetch burst transfer of the second data set stored in the slave device, corresponding to the data stored between the system bus boundaries, by temporarily storing this second data set in the buffer, Temporarily stored first and second data sets can be read by the master device via the peripheral bus in a single burst read transfer.