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Process of fabricating semiconductor device having doped polysilicon layer without segregation of dopant impurity

机译:具有掺杂的多晶硅层而没有掺杂杂质的偏析的半导体器件的制造方法

摘要

An intentionally undoped amorphous silicon layer, a phosphorous doped amorphous silicon layer and a tungsten silicide layer are successively laminated on a gate oxide layer, and are patterned into a gate electrode of a field effect transistor; while a phosphosilicate glass layer over the gate electrode is being reflowed, the amorphous silicon layers are crystallized to a polysilicon layer, and phosphorous is less segregated at the boundary between the gate oxide layer and the polysilicon layer during the heat treatment.
机译:将有意未掺杂的非晶硅层,磷掺杂的非晶硅层和硅化钨层依次层叠在栅极氧化层上,并构图成场效应晶体管的栅极。当使栅电极上的磷硅酸盐玻璃层回流时,非晶硅层结晶为多晶硅层,并且在热处理期间磷在栅氧化物层和多晶硅层之间的边界处的偏析较少。

著录项

  • 公开/公告号US5885889A

    专利类型

  • 公开/公告日1999-03-23

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION;

    申请/专利号US19970810852

  • 发明设计人 FUMIKI AISOU;

    申请日1997-03-04

  • 分类号H01L21/3205;

  • 国家 US

  • 入库时间 2022-08-22 02:08:27

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