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PHASE INDETERMINACY ELIMINATION CIRCUIT FOR DEMODULATION SIGNAL HAVING PHASE INDETERMINACY AND FRAME SYNCHRONOUS CIRCUIT
PHASE INDETERMINACY ELIMINATION CIRCUIT FOR DEMODULATION SIGNAL HAVING PHASE INDETERMINACY AND FRAME SYNCHRONOUS CIRCUIT
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机译:具有相位不确定性和框架同步电路的解调信号的相位不确定性消除电路
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摘要
PROBLEM TO BE SOLVED: To obtain a circuit configuration that is as simple as possible by providing UW detection circuits which are as many as the number of patterns that take phase indeterminacy and comparing with a preliminarily defined UW. ;SOLUTION: UW detection circuits 31 to 34 generate four kinds of phases by respectively combining demodulation signals P1 and P2 and inversion P1 and P2 that is an output of their inverting circuits and perform unique word detection to respective phases. A UW frame synchronous circuit 5 establishes radio frame synchronization by using the detection result of an accurate phase among four pieces of detection results which are outputs of the respective UW detection circuits and also outputs synchronous information representing a frame synchronous state and a frame pulse showing a UW position. A phase decision circuit 2 selects a correct phase from the combinations of the signals P1 and P2 and the inversion P1 and P2 according to detection results 1 to 4 outputted from the circuits 31 to 34, the synchronous information and the frame pulse and outputs digital signals Pr1 and Pr2 from which phase indeterminacy is eliminated.;COPYRIGHT: (C)2000,JPO
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