CHANNEL SELECTION MULTIPLEXER CIRCUIT, CHANNEL SELECTION DEMULTIPLEXER CIRCUIT AND DIGITAL COMMUNICATION SYSTEM USING THEM

摘要

PROBLEM TO BE SOLVED: To provide a channel selection multiplexer circuit where a data area in a frame is effectively and freely used and set by the user. ;SOLUTION: Rate detection circuits 19-22 calculate the transmission rate of each channel based on the system clock from a frame counter 31, outputs from flip-flop circuits 11-14 and outputs from AND circuits 15-18, detects channel information and outputs. FIFO memories 23-26 each applies speed conversion to channel data from each terminal. A channel assignment circuit 32 decides the assignment in a frame area used by each channel based on the detection result of the rate detection circuit 19-22 and controls to read from the FIFO memories 23-26 based thereon. A multiplexing section 33 synthesizes outputs from the FIFO memories 23-26 and integral rate information outputted from the channel assignment circuit 32 to generate multiplex data.;COPYRIGHT: (C)2000,JPO