HIGH SPEED SERIAL ERRATA SITUATION POLYNO MIAL CAICULATION CIRCUIT IN REED-SOLDMON

摘要

The present invention relates to error correction system using Reed solomon code, particularly in calculating error polynomial position polynomial, error polynomial, erasure position polynomial, number of erasers, erasure overflow signal An error correction system and method in a Reed Solomon decoder for calculating a position polynomial and outputting this and the input syndrome again to calculate an error position.