首页> 外国专利> Semiconductor integrated circuit device having fundamental cells and method of manufacturing the semiconductor integrated circuit device using the fundamental cells

Semiconductor integrated circuit device having fundamental cells and method of manufacturing the semiconductor integrated circuit device using the fundamental cells

机译:具有基本单元的半导体集成电路装置以及使用该基本单元的半导体集成电路装置的制造方法

摘要

A semiconductor integrated circuit having a plurality of fundamental cells respectively composed of a pair of p-channel field effect transistors and a pair of n-channel field effect transistors is disclosed. Elements of each fundamental cell are connected by lines, the fundamental cells are connected by lines, and a circuit is formed. The p- channel field effect transistors are formed in symmetry to each other, the n-channel field effect transistors are formed in symmetry to each other, one p-channel field effect transistor and one n-channel field effect transistor are formed in symmetry to each other, and the other p- channel field effect transistor and the other n-channel field effect transistor are formed in symmetry to each other. Also, a gate of each field effect transistor is formed in an H shape, and a line pitch between lines of a second layer is shorter than an arranging interval (or bulk pitch) between contact portions respectively connecting a line of a first layer and an element of the fundamental cell.
机译:公开了一种具有多个基本单元的半导体集成电路,所述多个基本单元分别由一对p沟道场效应晶体管和一对n沟道场效应晶体管组成。每个基本单元的元件通过线连接,基本单元通过线连接,并且形成电路。 p沟道场效应晶体管彼此对称地形成,n沟道场效应晶体管彼此对称地形成,一个p沟道场效应晶体管和一个n沟道场效应晶体管彼此对称地形成。另一个p沟道场效应晶体管和另一个n沟道场效应晶体管彼此对称地形成。另外,每个场效应晶体管的栅极形成为H形,并且第二层的线之间的线间距比分别连接第一层的线和第二层的线的接触部之间的布置间隔(或体间距)短。基本单元的元素。

著录项

  • 公开/公告号US6057225A

    专利类型

  • 公开/公告日2000-05-02

    原文格式PDF

  • 申请/专利权人 FUJITSU LIMITED;

    申请/专利号US19980184970

  • 发明设计人 NOBORU YOKOTA;

    申请日1998-11-03

  • 分类号H01L21/70;

  • 国家 US

  • 入库时间 2022-08-22 01:37:18

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