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Logic system and method employing multiple configurable logic blocks and capable of implementing a state machine using a minimum amount of configurable logic

机译:使用多个可配置逻辑块并能够使用最少数量的可配置逻辑来实现状态机的逻辑系统和方法

摘要

A logic system is presented including multiple configurable logic blocks (CLBs) implementing a state machine having multiple states, each state being associated with one or more logic functions and one or more possible next states. Each CLB includes programmable logic circuitry, and is configurable to implement the logic functions required in any given state. A complex state machine may be implemented using only 1+s CLBs, where s is the maximum number of next states of any state, thereby using a minimum amount of configurable logic. The logic system also includes a memory unit, a control unit coupled to the memory unit and to each of the CLBs, and an interface unit coupled to the control unit and to each of the CLBs. The memory unit stores configuration data required to configure the CLBs and state transition information. The control unit generates and stores current state information. Following programming, a single "active" CLB implements the logic functions required in the current state. The remaining CLBs are "inactive". While in the current state, the control unit uses state transition information from the memory unit and current state information to determine the possible next states. The control unit then retrieves configuration data from the memory unit corresponding to each of the possible next states, and programs one inactive CLB for each possible next state. The interface unit routes input signals to, and output signals from, the active CLB in response to a control signal from the control unit.
机译:提出了一种逻辑系统,其包括实现具有多个状态的状态机的多个可配置逻辑块(CLB),每个状态与一个或多个逻辑功能以及一个或多个可能的下一状态相关联。每个CLB包括可编程逻辑电路,并且可配置为在任何给定状态下实现所需的逻辑功能。可以仅使用1 + s个CLB来实现复杂状态机,其中s是任何状态的下一个状态的最大数量,从而使用最少数量的可配置逻辑。该逻辑系统还包括存储单元,耦合到该存储单元和每个CLB的控制单元,以及耦合到该控制单元和每个CLB的接口单元。存储器单元存储配置CLB所需的配置数据和状态转换信息。控制单元生成并存储当前状态信息。编程后,单个“活动” CLB实现当前状态下所需的逻辑功能。其余的CLB处于“非活动状态”。在当前状态下,控制单元使用来自存储单元的状态转换信息和当前状态信息来确定可能的下一个状态。然后,控制单元从存储单元中检索与每个可能的下一个状态相对应的配置数据,并对每个可能的下一个状态编程一个无效的CLB。接口单元响应于来自控制单元的控制信号,将输入信号路由到有源CLB以及从有源CLB输出信号。

著录项

  • 公开/公告号US6097988A

    专利类型

  • 公开/公告日2000-08-01

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号US19980021350

  • 发明设计人 DAVID F. TOBIAS;

    申请日1998-02-10

  • 分类号G05B11/01;G06F7/38;

  • 国家 US

  • 入库时间 2022-08-22 01:36:31

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