METHOD FOR DESIGNING INPUT SCHEMITT BUFFER CIRCUIT IN GATE ARRAY AND INPUT SCHMITT BUFFER CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a designing method for realizing a Schmitt buffer circuit having desired hysteresis characteristics (width) and to provide an input Schmitt buffer circuit constituted by the method in a gate array through the use of a MOS transistor with previously generated and fixed p, n and W, L. SOLUTION: The input Schmitt buffer circuit is constituted of a first CMOS inverter circuit 11 having a high input inversion voltage, a second CMOS inverter circuit 12 having a low input inversion voltage and a latch circuit 14. The first CMOS inverter circuit 11 is constituted of a CMOS inverter function circuit which is a two-input NAND circuit with a configuration where a single input signal IN is commonly applied to its two inputs and the second CMOS inverter circuit 12 is constituted of a CMOS inverter function circuit which is a two-input NOR circuit with a configuration where the single input signal IN is commonly applied to its two inputs.