Method and system for reducing state space variables prior to symbolic model checking

摘要

A computer-implemented method for systematically eliminating redundant circuit elements in a state machine of a model having sequential circuit elements possessing one of a fixed number of possible states, typically 0 and 1. Initially, the sequential circuit elements are sorted into groups whose state is determinate i.e. equal to 0 or 1. The state of each circuit element whose state is determinate is stored in memory and its next state is calculated and compared with its preceding state. Each circuit element whose successive states are different is moved to the group of indeterminate circuit elements, and the cycle is repeated in respect of all remaining determinate circuit elements until no further circuit elements are moved. Each of the remaining determinate circuit elements is then replaced by a constant equal to its corresponding state i.e. 0 or 1. Finally, any circuit elements whose output is connected to one or more of the replaced circuit elements and to no other circuit elements is eliminated from the model.