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Programmable logic integrated circuit architecture incorporating a global shareable expander
Programmable logic integrated circuit architecture incorporating a global shareable expander
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机译:包含全局共享扩展器的可编程逻辑集成电路架构
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摘要
A logic element for a programmable logic device to implement a global shareable expander. The logic element includes logic modules (P0-P4) for implementing combinatorial logic and a register (445). The combinatorial and registered paths of a logic element may be utilized at the same time. The logic modules may be programmably coupled to the register. The output of the register may be programmably coupled through an output buffer (515) to an I/O pad (520) of the integrated circuit. The logic modules may bypass the register and directly programmably couple through the output buffer to the I/O pad. A logic module may be used as a shareable expander by programmably coupling the module through to a global interconnect with other logic modules in LABs coupled to the global interconnect.
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