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Integrated circuit cell layout optimisation method has initial cell layout automatically modified after optimisation of component dimensions
Integrated circuit cell layout optimisation method has initial cell layout automatically modified after optimisation of component dimensions
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机译:集成电路单元布局优化方法可在组件尺寸优化后自动修改初始单元布局
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摘要
The optimisation method has a cell-based network list provided for use in calculating the integrated circuit layout, with extraction of a primary network list from the layout and optimisation of the component dimensions of at least some of the components of the integrated circuit using defined optimisation parameters. A secondary network list is generated using the results of the component optimisation, with subsequent automatic modification of the cell layout. Also included are Independent claims for the following: (a) a device for design of semiconductors; (b) a program object for a cell in a cell library for design of integrated circuits
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