Microprocessor test mode input, uses control signal that holds reset pin on counter that controls selection of operating mode to logic level that ensures mode switching does not occur during microprocessor initialization

摘要

The microprocessor has a counter (CNTR) with a count input (E1) and a reset input (E2). The reset input is controlled by a signal (CS) present on a microprocessor pin (P2). The control signal is set either internally (R1) or externally to a logic value that ensures the counter reset is active during the initialization of the microprocessor.