AUTOMATIC WIRING PATTERN LAYOUT METHOD, OPTICAL LAYOUT PATTERN CORRECTION METHOD, SEMICONDUCTOR INTEGRATED CIRCUIT MANUFACTURED BASED ON AUTOMATIC LAYOUT METHOD AND OPTICAL CORRECTION METHOD, AND OPTICAL AUTOMATIC LAYOUT CORRECTION PROGRAM

摘要

PROBLEM TO BE SOLVED: To provide an automatic layout method which can ensure an enough VIA sectional area even after exposure by using a small volume of data, and to provide an optical correction method. SOLUTION: A first wiring pattern having a line width W and extending in a first direction is generated, and a second wiring pattern having a predetermined angle with the first wiring pattern and extending on the slant is generated so that its end part is overlapped each other with the end part of the first wiring pattern. On the cross point between the center line of the first wiring pattern in the longitudinal direction and the center line of the second wiring pattern in the longitudinal direction, a rectangular VIA pattern having a aspect ratio of nearly 2 and extending along the first wiring pattern is generated so that its central point is on the crossing point. Moreover, a extended region of the rectangular VIP pattern is generated on the base of its central point, and as this extended region is merged with a slanted second wiring pattern, a merged pattern is generated. This merged pattern is divided into a plurality of regions extending in a predetermined direction.