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Apparatus and method using a register scheme for efficient evaluation of equations in a network switch

机译:使用寄存器方案在网络交换器中有效评估方程的设备和方法

摘要

A network switch, configured for performing layer 2 and layer 3 switching in an Ethernet (IEEE 802.3) network includes a network switch port having a filter configured for evaluating an incoming data packet. The filter includes a min term memory configured for storing min term values. Each min term value is stored based on a location of a corresponding selected byte of the incoming data packet for comparison. Each min term is stored as a table entry having an expression portion specifying a corresponding comparison operation and a template identifier field that specifies templates that use the corresponding min term. The template identifier field includes an equation identifier. A min term generator is configured for simultaneously comparing a received byte of the incoming data packet with the min terms that correspond to the received byte and generates respective min term comparison results. An equation core is configured for evaluating equations and generates a frame tag identifying the incoming data packet based on the min term comparison results relative to the templates. The equation core is configured to identify equations which are no longer relevant. An equation reduction module includes a plurality of register arrays. Each register array includes equation identifiers corresponding to the corresponding byte. The equation reduction module includes logic configured to compare the equation identifiers of equations which are no longer relevant to equation identifiers in the register arrays and based on the comparison, to set vectors. A min term controller is configured to read the vectors and based thereon, to send necessary min terms to the min term generator.
机译:配置为在以太网(IEEE 802.3)网络中执行第2层和第3层交换的网络交换机包括网络交换机端口,该端口具有配置为评估传入数据包的过滤器。该过滤器包括配置用于存储最小项值的最小项存储器。基于输入数据分组的相应选定字节的位置存储每个最小项值以进行比较。每个最小项被存储为一个表条目,该表条目具有一个表达式部分,该表达式部分指定了一个相应的比较运算,一个模板标识符字段指定了使用相应的最小项的模板。模板标识符字段包括方程式标识符。最小项生成器被配置为用于同时比较输入数据分组的接收字节和与接收到的字节相对应的最小项,并生成各自的最小项比较结果。方程式核心被配置用于评估方程式,并基于相对于模板的最小项比较结果生成标识进入数据包的帧标签。方程核心配置为识别不再相关的方程。方程式简化模块包括多个寄存器阵列。每个寄存器阵列包括对应于相应字节的方程式标识符。方程式减少模块包括被配置为比较不再与寄存器阵列中的方程式标识符相关的方程式的方程式标识符并且基于该比较来设置矢量的逻辑。最小项控制器被配置为读取向量并且基于其,以将必要的最小项发送到最小项生成器。

著录项

  • 公开/公告号US6678272B1

    专利类型

  • 公开/公告日2004-01-13

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号US20000577321

  • 发明设计人 SHR-JIE TZENG;

    申请日2000-05-24

  • 分类号H04L125/60;

  • 国家 US

  • 入库时间 2022-08-21 23:14:52

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