Circuit of associative Memory to perform write Operations and selectable portions of search words in parallel, and a system that allows it to adapt to different sizes and configurations of words for which a system operations affect only a portion.

摘要

Circuit of associative Memory to perform write Operations and selectable portions of search words in parallel, capable of undertaking all kinds of arithmetic and logical in parallel, with a system for random access of the cells for Operations d And reading and writing.The Memory circuit is composed by a set of identical cells, each with a capacity of 4 bits, in which transactions are conducted, are connected in a Chain Shape in both directions, from the first to the last cell.A Selection system for binary Pattern can generate signals in All The Words of the circuit at the same time, and also to generate signals in parallel within these words, which are composed by consecutive cells, and are created from Binary programmed Pattern Can t Omar a variety of Power of two sizes.A Selection system blocks allows to assign to a given process, an arrangement of consecutive words, previously formed.The Search operation in parallel, selectively compares the data stored in the cell and the data provided, in cells of all the words in a block at a time, by storing the results of the comparison in the same cell.That is applied in two ways: as in the associative addressing Information and basis for writing in parallel; this operation can continue a comparison previously done in another cell, through entries in cascade.The write operation in parallel is capable of writing selectively in cells of all the words in a Block At the same time, based on the information stored in the search operation in parallel; this operation can also continue the writing done in another cell.The associative addressing allows Interpreting the direction of a cell with its content, and is based on the information obtained from Search operations in parallel.