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SIZE DOWN TRENCHES BY ETCHING WITHOUT SACRIFICING VERTICAL PROFILE

机译:在不牺牲垂直轮廓的情况下通过缩小尺寸来缩小沟槽

摘要

ABSTRACTMETHOD OF ETCHING TRENCHES FOR METALLIZATION OF INTEGRATED CIRCUIT DEVICES WITH A NARROWER WIDTH THAN THE DESIGN MASK PROFILEA method of etching trenches through a low-k material layer using a hard mask wherein the trenches are sized down from the mask size by etching without sacrificing a vertical trench profile is described. A low-k dielectric material is provided over a region to be contacted on a substrate. A hard mask layer is deposited overlying the dielectric material. A mask is formed over the hard mask layer wherein the mask has a first opening of a first width. A second opening is etched in the hard mask layer where it is exposed by the mask wherein the second opening has a second width smaller than the first width and wherein the second opening has inwardly sloping sidewalls. A trench is etched through the dielectric layer to the region to be contacted through the second opening whereby the trench has a width equal to the second width. The trench is filled with a metal layer to complete fabrication of the integrated circuit device.(FIGURE 2 IS SUGGESTED FOR PUBLICATION)
机译:抽象集成电路金属化的沟槽刻蚀方法具有比设计模板轮廓更窄的设备一种通过低k材料蚀刻沟槽的方法使用硬掩膜层,其中沟槽尺寸缩小在不牺牲垂直度的情况下通过蚀刻从掩模尺寸中去除描述了沟槽轮廓。低k介电材料是提供在衬底上要接触的区域上。一种硬掩模层沉积在电介质上材料。在硬掩模层上形成掩模,其中掩模具有第一宽度的第一开口。一秒在暴露的硬掩模层中蚀刻出开口通过掩模,其中第二开口具有第二宽度小于第一宽度,并且其中第二开口具有向内倾斜的侧壁。刻蚀沟槽介电层到要通过其接触的区域第二个开口,沟槽的宽度等于第二宽度。沟槽填充有金属层,以完成集成电路器件的制造。(建议图2出版)

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