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Process for designing FPGAs for dynamically reconfigurable computing
Process for designing FPGAs for dynamically reconfigurable computing
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机译:设计用于动态可重构计算的FPGA的过程
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摘要
A method of configuring a field programmable gate array (FPGA) for dynamically reconfigurable computing; the method comprising the steps of: a) programming the hist processor with instructions in a high level language; b)providing a compiler running on the host processor for generating executable code in response to the instructions; and c) connecting the hist processor to the FPGA for dynamic reconfiguration programming of the FPGA by the hist processor via the executable code.
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