首页> 外国专利> EMULATING NARROW BAND PHASE-LOCKED LOOP BEHAVIOR ON A WIDE BAND PHASE-LOCKED LOOP

EMULATING NARROW BAND PHASE-LOCKED LOOP BEHAVIOR ON A WIDE BAND PHASE-LOCKED LOOP

机译:在宽频带锁相环上模拟窄带锁相环的行为

摘要

A phase-locked loop circuit for providing a tightly controlled capture range for locking an output signal to a data signal, while also providing a wide frequency capture range for initially pulling the output signal within a wider, predetermined frequency range. The apparatus detects a frequency difference between at least one reference signal and an output signal, and generates a frequency error signal in response to the frequency difference. A phase difference is detected between a received input signal and the output signal, and a phase error signal is generated in response to the phase difference. The frequency error signal and the phase error signal are combined to control the frequency of the output signal by controlling a voltage-controlled oscillator.
机译:锁相环电路,用于提供严格控制的捕获范围,以将输出信号锁定到数据信号,同时还提供宽的频率捕获范围,以在较宽的预定频率范围内初始拉动输出信号。该设备检测至少一个参考信号与输出信号之间的频率差,并响应于该频率差而产生频率误差信号。在接收到的输入信号和输出信号之间检测到相位差,并且响应于该相位差而产生相位误差信号。频率误差信号和相位误差信号被组合以通过控制压控振荡器来控制输出信号的频率。

著录项

  • 公开/公告号EP0968568B1

    专利类型

  • 公开/公告日2005-06-29

    原文格式PDF

  • 申请/专利权人 LEVEL ONE COMMUNICATIONS INC;

    申请/专利号EP19980911466

  • 发明设计人 EVERITT JAMES;PARKER JAMES;

    申请日1998-03-04

  • 分类号H03L7/113;

  • 国家 EP

  • 入库时间 2022-08-21 22:10:47

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