METHOD FOR FABRICATING MOS TRANSISTOR USING TOTAL GATE SILICIDATION PROCESS TO SIMULTANEOUSLY FORM SILICIDE LAYER AND GATE SILICIDE LAYER IN SOURCE/DRAIN REGION AND PREVENT CHANNEL ION IMPLANTATION DURING SOURCE/DRAIN ION IMPLANTATION PROCESS

摘要

PURPOSE: A method for fabricating a MOS(metal oxide semiconductor) transistor is provided to simultaneously form a silicide layer and a gate silicide layer in a source/drain region and prevent channel ion implantation during a source/drain ion implantation process by performing a total gate silicidation process. CONSTITUTION: An insulated gate pattern(7) in which a silicon pattern and a sacrificial layer pattern are sequentially stacked is formed on a semiconductor substrate. The sidewall of the gate pattern is covered with a spacer. By using the spacer and the gate pattern as an ion implantation mask, impurity ions are implanted into the semiconductor substrate to form a source/drain region(11). The sacrificial layer pattern on the semiconductor substrate having the source/drain region is eliminated to expose the silicon pattern. The exposed silicon pattern is completely converted into a gate silicide layer while a source/drain silicide layer is selectively formed on the source/drain region.