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Dynamic random access memory semiconductor memory device, has pre-charger circuits connected between different pairs of bit lines, and two bit lines in each bit line pair connected to different pre-charge circuits
Dynamic random access memory semiconductor memory device, has pre-charger circuits connected between different pairs of bit lines, and two bit lines in each bit line pair connected to different pre-charge circuits
The device has a set of bit line pairs, where alternate pairs are twisted between adjacent arrays of a memory cell. Each pair of the bit lines has an associated sense amplifier for detecting voltage differences between the pair of bit lines. A set of pre-charger circuits (702A, 702B) are connected between different pairs of the lines, where the two bits lines in each pair are connected to the different pre-charge circuits.
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