首页> 外国专利> Wells and/or trench formation, in manufacture of integrated circuit, involves simultaneously etching trenches and wells, and depositing thick silicon oxide layer by non-conformal deposition in trenches and wells to close openings

Wells and/or trench formation, in manufacture of integrated circuit, involves simultaneously etching trenches and wells, and depositing thick silicon oxide layer by non-conformal deposition in trenches and wells to close openings

机译:在集成电路的制造中,阱和/或沟槽的形成涉及同时刻蚀沟槽和阱,并通过在沟槽和阱中进行非保形沉积来沉积厚的氧化硅层以封闭开口。

摘要

The method involves simultaneously etching trenches (4, 6) and wells (5). A silicon nitride layer (8) is deposited over an entire structure of the trenches and wells to cover walls and bottom of the trenches and wells. A thick silicon oxide layer (9) is deposited by non-conformal deposition over the entire structure for closing openings of the trenches and wells. The layer (9) is selectively opened according to subsequent processings.
机译:该方法包括同时蚀刻沟槽(4、6)和阱(5)。氮化硅层(8)沉积在沟槽和阱的整个结构上以覆盖沟槽和阱的壁和底部。通过非共形沉积在整个结构上沉积厚的氧化硅层(9),以封闭沟槽和阱的开口。根据随后的处理选择性地打开层(9)。

著录项

  • 公开/公告号FR2880191A1

    专利类型

  • 公开/公告日2006-06-30

    原文格式PDF

  • 申请/专利权人 STMICROELECTRONICS SA SOCIETE ANONYME;

    申请/专利号FR20040053170

  • 发明设计人 ANCEAU CHRISTINE;

    申请日2004-12-23

  • 分类号H01L21/71;H01L21/02;

  • 国家 FR

  • 入库时间 2022-08-21 21:17:18

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号