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DIGITAL SIGNAL PROCESSING METHOD AND DIGITAL SIGNAL PROCESSING SYSTEM

机译:数字信号处理方法及数字信号处理系统

摘要

PPROBLEM TO BE SOLVED: To improve the quality of an output signal and to reduce electric power consumption by effectively utilizing the capabilities of a processing system which performs a plurality of arithmetic processing in parallel or in time sharing even in case of the occurrence of a processing remainder. PSOLUTION: The digital signal processing device is equipped with an arithmetic processing result storage memory M1 which stores the result of the arithmetic processing of the first arithmetic processing means 11 and the second arithmetic processing means 12, an arithmetic processing information storage memory M2 which stores the arithmetic processing control information on the arithmetic processing of each of the respective arithmetic processing means, a processing quantity monitor means 13 which monitors the processing quantity of the first arithmetic processing means, and a processing content determination means 14 which determines the processing contents of the second arithmetic processing means 12 using the processing quantity and the arithmetic processing control information, in which the capabilities of the processor are dynamically allocated with respect to the increase and decrease of the processing quantity. PCOPYRIGHT: (C)2007,JPO&INPIT
机译:

要解决的问题:通过有效利用处理系统的能力来提高输出信号的质量并降低功耗,即使在发生这种情况时,该处理系统也可以并行或分时执行多个算术处理处理余数。

解决方案:数字信号处理设备配备有运算处理结果存储存储器M1,其存储第一运算处理装置11和第二运算处理装置12的运算处理结果,以及运算处理信息存储存储器M2。存储有关于各个算术处理单元的算术处理的算术处理控制信息的处理单元,监视第一算术处理单元的处理量的处理量监视单元13,以及确定处理内容的处理内容决定单元14使用处理量和算术处理控制信息来进行第二算术处理装置12的处理,其中,相对于处理量的增加和减少动态地分配处理器的能力。

版权:(C)2007,日本特许厅&INPIT

著录项

  • 公开/公告号JP2006343388A

    专利类型

  • 公开/公告日2006-12-21

    原文格式PDF

  • 申请/专利权人 MATSUSHITA ELECTRIC IND CO LTD;

    申请/专利号JP20050166648

  • 发明设计人 NAKABASHI JUNICHI;

    申请日2005-06-07

  • 分类号G10L19/02;G06F9/50;G06F9/48;G10L19;

  • 国家 JP

  • 入库时间 2022-08-21 21:10:38

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