CMOS LATCH TYPE COMPARATOR

摘要

PROBLEM TO BE SOLVED: To more simplify a circuit configuration of a CMOS latch type comparator by reducing the number of MOS transistors to be used in a latch circuit of a CMOS latch type comparator.;SOLUTION: The latch circuit 2 is configured by MOS transistors M5a, M5b for input signal which is formed so that output voltages V_O+, V_O- of a comparator circuit 1 are input into a gate of each of the transistors, and the transistors are a pair of MOS transistors forming a differential pair in combination with MOS transistors MB2a, MB2b for bias forming a constant power source, and by MOS transistors M4a, M4b for switch which are connected in series between the constant power sources MB2a, MB2b and the differential pair M5a, M5b, and the transistors are a pair of MOS transistors forming a crossing coupling pair. With this configuration, switching of the state of the latch circuit 2 is executed only by the pair of MOS transistors M5a, M5b for input signal forming the differential pair.;COPYRIGHT: (C)2007,JPO&INPIT