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Current mode logic scheme and circuit for matchline sense amplifier design using constant current bias cascode current mirrors
Current mode logic scheme and circuit for matchline sense amplifier design using constant current bias cascode current mirrors
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机译:用于使用恒定电流偏置共源共栅电流镜的匹配线读出放大器设计的电流模式逻辑方案和电路
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摘要
A CAM device features matchlines which are coupled in series between a top current source, a bottom current source, and ground. The top current source is configured to supply a first current to the matchline and the bottom current source, while the bottom current source is configured to supply a second current to ground. The magnitude of the first current is limited by the operation of the CAM cells coupled to the matchline, and is duplicated by a current mirror architecture. The mirrored of the first current, known as the sense current, is coupled to a measurement circuit to measure the state of the matchline. This architecture features lower power consumption and faster matchline evaluations.
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