首页> 外国专利> Silicon-doped layer manufacturing method for field effect transistor, involves forming semiconductor layer in recess to produce tensile strain in transistor channel region, and forming top coating on layer and silicon-doped layer on coating

Silicon-doped layer manufacturing method for field effect transistor, involves forming semiconductor layer in recess to produce tensile strain in transistor channel region, and forming top coating on layer and silicon-doped layer on coating

机译:用于场效应晶体管的硅掺杂层的制造方法,包括在凹槽中形成半导体层以在晶体管沟道区中产生拉伸应变,以及在该层上形成顶涂层以及在涂层上形成硅掺杂层

摘要

The method involves forming a recess adjacent to a gate electrode (106) of a field effect transistor. A semiconductor layer is formed on the recess by selective epitaxial waxing for producing tensile strain in a channel region (111) of the transistor. The semiconductor layer is a silicon/carbon-layer with one atomic percentage of carbon. A top coating is formed on the semiconductor layer by depositing a silicon layer (108), and a silicon-doped layer is formed on the top coating by depositing a metal layer e.g. cobalt layer. An independent claim is also included for a field effect transistor with a source/drain layer and a channel region.
机译:该方法包括形成与场效应晶体管的栅电极(106)相邻的凹槽。通过选择性外延打蜡在凹槽上形成半导体层,以在晶体管的沟道区(111)中产生拉伸应变。半导体层是具有一个原子百分比的碳的硅/碳层。通过沉积硅层(108)在半导体层上形成顶涂层,并且通过沉积金属层例如硅层在顶涂层上形成硅掺杂层。钴层。对于具有源极/漏极层和沟道区的场效应晶体管也包括独立的权利要求。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号