首页> 外国专利> Bias voltage generator for semiconductor integrated circuit, has decoder that outputs trimming information for bias voltage by decoding comparison signal of reference bias voltage and bias voltage

Bias voltage generator for semiconductor integrated circuit, has decoder that outputs trimming information for bias voltage by decoding comparison signal of reference bias voltage and bias voltage

机译:用于半导体集成电路的偏置电压发生器,具有解码器,该解码器通过解码参考偏置电压和偏置电压的比较信号来输出偏置电压的修整信息

摘要

A bias voltage generation circuit generates a bias voltage which is automatically trimmed using a reference bias voltage as a reference voltage. A voltage comparator compares the reference bias voltage with the generated bias voltage to output a comparison signal. A decoder decodes the comparison signal and outputs the result of decoding as a trimming information for the bias voltage to the bias voltage generation circuit. An independent claim is included for method for automatically trimming bias voltage.
机译:偏置电压产生电路生成使用参考偏置电压作为参考电压自动修整的偏置电压。电压比较器将基准偏置电压与产生的偏置电压进行比较以输出比较信号。解码器对比较信号进行解码,并且将解码结果作为针对偏置电压的修整信息输出至偏置电压生成电路。包括一个独立的权利要求自动调整偏置电压的方法。

著录项

  • 公开/公告号FR2893727A1

    专利类型

  • 公开/公告日2007-05-25

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO LTD;

    申请/专利号FR20060003939

  • 发明设计人 LEE SEUNG WON;

    申请日2006-05-03

  • 分类号G05F1/45;G11C5/14;

  • 国家 FR

  • 入库时间 2022-08-21 20:26:53

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