PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit design support device, a semiconductor integrated circuit support method, and a semiconductor integrated circuit design support program for simulating a gate level netlist without rewriting a test bench even when a signal included in an RTL to be monitored in the simulation of the RTL is not included in the gate level netlist.;SOLUTION: A semiconductor integrated circuit design support device 200 is provided with an equivalent signal extraction part 290 for extracting a signal equivalent to a signal to be monitored in an RTL from a netlist. When any signal to be monitored in the RTL is not included in the gate level netlist, the signal extracted from the equivalent signal extraction part 190 is used as the signal to be monitored, and the gate level netlist is simulated.;COPYRIGHT: (C)2009,JPO&INPIT
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