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OPTIMIZED DEEP SOURCE/DRAIN JUNCTIONS WITH THIN POLY GATE IN A FIELD EFFECT TRANSISTOR
OPTIMIZED DEEP SOURCE/DRAIN JUNCTIONS WITH THIN POLY GATE IN A FIELD EFFECT TRANSISTOR
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机译:场效应晶体管中具有薄多晶栅的优化深源/漏极结
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摘要
A semiconductor structure in which the poly depletion and parasitic capacitance problems with poly-Si gate are reduced is provided as well as a method of making the same. The structure includes a thin poly-Si gate and optimized deep source/drain doping. The method changes the sequence of the different implantations steps and makes it possible to fabricate the structure without having dose loss or doping penetration problems. In accordance with the present invention, a sacrificial hard mask capping layer is used to block the high energy implantation and a 3-1 spacer (off-set spacer, first spacer and second spacer) scheme is used to optimize the source/drain doping profile. With this approach, the dose implanted into the thin poly-Si gate can be increased while the deep source/drain implantation can be optimized without worrying about the penetration problem.
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