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Repair of memory hard failures during normal operation, using ECC and a hard fail identifier circuit
Repair of memory hard failures during normal operation, using ECC and a hard fail identifier circuit
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机译:使用ECC和硬故障标识符电路修复正常操作期间的存储器硬故障
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摘要
A memory sub-system and a method for operating the same. The memory sub-system includes (a) a main memory, (b) an ECC circuit, (c) a hard fail identifier circuit, (d) a repair circuit, (e) a redundant memory, and (f) a threshold setting circuit. The ECC circuit is capable of (i) detecting a first bit fail, (ii) sending an error flag signal to the hard fail identifier circuit, (iii) sending a first location address, a first bit location of the first bit fail, and a repaired data from the first location address to the hard fail identifier circuit. The hard fail identifier circuit is capable of (i) determining the number of times of failure occurring at the first bit fail, (ii) determining whether the number of times of failure is equal to a predetermined threshold value, and (iii) if so, sending a threshold reached signal.
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