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CIRCUITRY FOR MITIGATING PERFORMANCE LOSS ASSOCIATED WITH FEEDBACK LOOP DELAY IN DECISION FEEDBACK EQUALIZER AND METHOD THEREFOR
CIRCUITRY FOR MITIGATING PERFORMANCE LOSS ASSOCIATED WITH FEEDBACK LOOP DELAY IN DECISION FEEDBACK EQUALIZER AND METHOD THEREFOR
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机译:决策反馈均衡器中与反馈循环延迟相关的性能损失降低的电路及其方法
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摘要
A decision feedback equalizer (DFE) includes a forward equalizer, first and second adders, a decision device, a feedback equalizer, and an N-tap filter. Preferably, the first and second adders, the decision device, and the feedback equalizer constitute a first feedback loop, the second adder, the decision device, and the N-tap filter constitute a second feedback loop. In that case, the second feedback loop is free of an implementation delay associated with the first feedback loop. In the exemplary DFE, N is a positive integer. If desired, the N-tap filter is implemented in fast logic. A method for controlling a decision feedback equalizer based on first and second feedback signals is also described.
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