首页> 外国专利> Memory e.g. static random access memory, has input register connected with data input and input/output circuit, and output register connected with circuit, where output register continues to give test data to input register in test mode

Memory e.g. static random access memory, has input register connected with data input and input/output circuit, and output register connected with circuit, where output register continues to give test data to input register in test mode

机译:记忆力静态随机存取存储器,其输入寄存器与数据输入和输入/输出电路相连,输出寄存器与电路相连,在测试模式下,输出寄存器继续将测试数据提供给输入寄存器

摘要

The memory (1) has an input/output circuit (3) connected with memory cells (2) of a memory field (4) and exchanges data with the memory cells. An output register (5) is connected with the input/output circuit. An input register (6) is connected with a data input (13) and with the input/output circuit. The data are provided into the memory cells over the data input and the input register. The output register continues to give test data to the input register in the test mode, and the test data are transmitted from the input register for the input/output circuit. An independent claim is also included for a method for testing a random access memory.
机译:存储器(1)具有与存储区(4)的存储单元(2)连接的输入/输出电路(3),并且与存储单元交换数据。输出寄存器(5)与输入/输出电路连接。输入寄存器(6)与数据输入(13)以及输入/输出电路连接。数据通过数据输入和输入寄存器提供到存储单元中。在测试模式下,输出寄存器继续将测试数据提供给输入寄存器,并且测试数据从输入寄存器传输到输入/输出电路。还包括用于测试随机存取存储器的方法的独立权利要求。

著录项

  • 公开/公告号DE102006024016A1

    专利类型

  • 公开/公告日2007-11-29

    原文格式PDF

  • 申请/专利权人 INFINEON TECHNOLOGIES AG;

    申请/专利号DE20061024016

  • 发明设计人 SPIRKL WOLFGANG;BROX MARTIN;

    申请日2006-05-23

  • 分类号G11C29/12;

  • 国家 DE

  • 入库时间 2022-08-21 19:49:56

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