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Multiple microcontroller system`s instruction for computer, has multiple-microcontroller unit-core-logic selection operand selecting microcontroller unit core logic, where instruction is written in simple format
Multiple microcontroller system`s instruction for computer, has multiple-microcontroller unit-core-logic selection operand selecting microcontroller unit core logic, where instruction is written in simple format
The instruction has an operation code defining an operation action e.g. arithmetic operation, of the instruction that is written in a simple format. A multiple-microcontroller unit-core-logic selection operand selects a microcontroller unit (MCU) core logic from MCU core logics, and selects a sub-unit of the MCU core logic. A MCU core logic identification (ID) is expressed in the form of a binary code of N consecutive or inconsecutive bits, where N is a natural number. The MCU core logic is used as a main operation microcontroller unit to fetch and decode the instruction. An independent claim is also included for an instruction execution method.
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