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It is low, electricity high raitoreitenshimodo and high electricity low raitoreitenshimodo and/or becoming independent, the memory storage and the mannered null multiple light/write receivers which
It is low, electricity high raitoreitenshimodo and high electricity low raitoreitenshimodo and/or becoming independent, the memory storage and the mannered null multiple light/write receivers which
The logic circuit (110), low electrical mode high raitoreitenshimodo, or the dynamic random access memory (20 and 22) the light/write receiver inside is operated high electrical mode low with either of raitoreitenshimodo. Being able to operate the 2nd signal and the storage unit which show whether or not line of memory cell inside the 1st signal and the storage unit where the logic circuit (110), raitoreitenshimodo makes high electrical low effective and shows how high is active state, with powering down mode, it receives the 4th signal which shows whether or not the lead/read transmitter inside the 3rd signal and the storage unit which show whether or not it is, is active state. The logic circuit (110), line of memory cell inside the storage unit is active state, when the storage unit with powering down mode when not to be in the midst of operating, the lead/read transmitter inside the storage unit is not active state, raitoreitenshimodo is made high electrical low effective, electric power to the light/write receiver is maintained.
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