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Multi-level logic circuit reconstruction method and reconstruction device of multi-level logic circuits, logic circuits correction device, as well as reconfigurable
Multi-level logic circuit reconstruction method and reconstruction device of multi-level logic circuits, logic circuits correction device, as well as reconfigurable
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机译:多级逻辑电路的重构方法,多级逻辑电路的重构装置,逻辑电路校正装置以及可重构
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摘要
Providing a reconstruction unit of a multi-level logic circuit capable of performing a simple reconfiguration of multi-level logic circuit in a small footprint, low power consumption and logic changes are possible. For example, when reconfiguring a multi-level logic circuit due to a logic change to delete the output vector F objective logic function F to the input vector b (X) and (b), pq is closest to the output side of said pq element unmodified sequentially selected from the element E G, when, of the pq element on the input side, the output value for the input vector b is also an output value for the input variable X of the input vector b other than pq elements previously selected you do not choose to be regarded as fixed everything has become. And I rewrite the invalid value the output value for the input vector b is selected.
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机译:提供一种多级逻辑电路的重构单元,该重构单元能够以较小的占地面积执行多级逻辑电路的简单重新配置,从而可以实现低功耗和逻辑改变。例如,当由于逻辑改变而重新配置多级逻辑电路以将输出矢量F目标逻辑函数F删除为输入矢量b(X)和(b)时,pq最接近所述pq元件的输出侧。当在输入侧的pq元素中输入向量b的输出值也是输入向量b的输入变量X的输出值时,从元素E G Sub>依次未经修改地选择除了先前选择的pq元素外,您不会选择一切都已变为固定。然后重写无效值,选择输入向量b的输出值。
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