首页> 外国专利> Being wiring check manner of the print patchboard which is executed at the time of the art work editing work regarding wiring of the print patchboard in on record media null ccad which

Being wiring check manner of the print patchboard which is executed at the time of the art work editing work regarding wiring of the print patchboard in on record media null ccad which

机译:在关于在记录介质上的印刷配线板的布线的美术作业编辑时执行的印刷配线板的布线检查方式

摘要

PROBLEM TO BE SOLVED: To provide a method for checking the wiring of a printed wiring board stably extracting nets regardless of the original data configuration, and also to provide a wiring check program for implementing the method.;SOLUTION: The wiring checking method includes: raster development processes (step S1-step S5, step S12) for causing raster development of artwork data onto the memory of a computer that constitutes a portion of a CAD system; centerline indexing processes (step S6-step S9) for selecting one figure element from images shown by the raster data obtained through the raster development and for indexing the centerline of the figure element; a pin recognition process for recognizing the end point coordinates of the indexed centerline as pins; and a connection relationship retrieval process (step S10) for retrieving the connection relationship between the pins recognized.;COPYRIGHT: (C)2005,JPO&NCIPI
机译:解决的问题:提供一种不管原始数据配置如何都稳定地检查印刷电路板的布线的方法,并提供用于实现该方法的布线检查程序。解决方案:布线检查方法包括:光栅显影处理(步骤S1-步骤S5,步骤S12),用于将图形数据光栅显影到构成CAD系统一部分的计算机的存储器上;中心线索引处理(步骤S6-步骤S9),用于从通过栅格展开获得的栅格数据所示的图像中选择一个图形元素,并对图形元素的中心线进行索引;销识别过程,用于将索引的中心线的端点坐标识别为销; COPYRIGHT:(C)2005,JPO&NCIPI;以及用于检索识别出的引脚之间的连接关系的连接关系检索处理(步骤S10)。

著录项

  • 公开/公告号JP4275541B2

    专利类型

  • 公开/公告日2009-06-10

    原文格式PDF

  • 申请/专利权人 シャープ株式会社;

    申请/专利号JP20040014729

  • 发明设计人 上野 幸宏;

    申请日2004-01-22

  • 分类号G06F17/50;H05K3;

  • 国家 JP

  • 入库时间 2022-08-21 19:37:48

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