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INTEGRATED CIRCUIT DESIGN SUPPORT APPARATUS, INTEGRATED CIRCUIT DESIGN SUPPORT METHOD, INTEGRATED CIRCUIT DESIGN SUPPORT PROGRAM, AND RECORDING MEDIUM WITH SAID PROGRAM RECORDED THEREIN
INTEGRATED CIRCUIT DESIGN SUPPORT APPARATUS, INTEGRATED CIRCUIT DESIGN SUPPORT METHOD, INTEGRATED CIRCUIT DESIGN SUPPORT PROGRAM, AND RECORDING MEDIUM WITH SAID PROGRAM RECORDED THEREIN
Provided is an integrated circuit design support apparatus capable of estimating the optimal wiring length and wiring congestion at the stage of implementing a logical design of an integrated circuit, thereby preventing the do-over of the logical design or functional design caused by a wiring delay that is discovered at a packaging design stage, and shortening the time required for designing the integrated circuit. The present invention is able to accurately estimate the wiring length between the modules and the wiring congestion in the modules at the stage of implementing the logical design of the integrated circuit, and reflect the logical design result of the integrated circuit in the packaging design of the integrated circuit.
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