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Computing system capable of parallelizing the operation of multiple graphics processing pipelines (GPPLS) supported on a multi-core CPU chip, and employing a software-implemented multi-mode parallel graphics rendering subsystem
Computing system capable of parallelizing the operation of multiple graphics processing pipelines (GPPLS) supported on a multi-core CPU chip, and employing a software-implemented multi-mode parallel graphics rendering subsystem
A computing system capable of parallelizing the operation of multiple graphics processing units (GPUs) supported on external graphics cards, employing a software-implemented multi-mode parallel graphics rendering subsystem. The computing system includes (i) CPU memory space for storing one or more graphics-based applications, (ii) a multi-core GPU chip including one or more CPU-cores, a memory controller for controlling the CPU memory space, and an interconnect network, and (iii) one or more external graphics cards supporting multiple GPUs and being connected to the multi-core CPU chip by way of a data communication interface. The computing system also includes (i) one or more graphics cards supporting multiple GPUs and being connected to the multi-core CPU chip by way of a data communication interface, (ii) the multi-mode parallel graphics rendering subsystem supporting multiple modes of parallel operation, (iii) a plurality of graphic processing pipelines (GPPLs) implemented using some of the CPU-cores, and (iv) an automatic mode control module. During the run-time of the graphics-based application, the automatic mode control module automatically controls the mode of parallel operation of the MMPGRS, so that the GPUs are driven in a parallelized manner.
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