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SYSTEM FOR SCHEDULING BASED ON HW/SW CO-DESIGN AND METHOD THEREFOR
SYSTEM FOR SCHEDULING BASED ON HW/SW CO-DESIGN AND METHOD THEREFOR
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机译:基于硬件/软件协同设计的调度系统及其方法
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摘要
A scheduling system and method based on hardware/software integration design are provided to make dynamic scheduling possible by using a hardware scheduler without artificial scheduling for a hardware task and a software task, thereby performing hardware/software tasks parallely at an instruction level. An instruction patch module(20) patches instruction from an instruction cache memory(10). An instruction queue module(40) stores the instruction which the instruction patch module patches from the instruction cache memory. An instruction dispatch module(30) reads the instruction stored in the instruction queue module. A memory related instruction buffer(50) stores a result enforcing the memory related instructions and re-arranges the result according to an original execution sequence. A register related instruction buffer(60) stores general-purpose instruction related information or primitive instruction related information among the instructions which the instruction dispatch module reads, stores a result enforcing a general-purpose instruction or a primitive instruction, and re-arranges the result according to an original execution sequence.
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