首页> 外国专利> FABRICATION METHOD OF A SEMICONDUCTOR DEVICE, CAPABLE OF BEING APPLIED TO A DUAL SILICIDE PROCESS AND A DUAL STRESS LINER PROCESS BY REMOVING ONE OF TWO SILICIDE BARRIER PROCESSES

FABRICATION METHOD OF A SEMICONDUCTOR DEVICE, CAPABLE OF BEING APPLIED TO A DUAL SILICIDE PROCESS AND A DUAL STRESS LINER PROCESS BY REMOVING ONE OF TWO SILICIDE BARRIER PROCESSES

机译:一种半导体装置的制造方法,该方法可通过去除两个硅化物阻挡层工序之一而应用于双硅化物工序和双应力衬里工序

摘要

PURPOSE: A fabrication method of a semiconductor device is provided to simplify a process and reduce time and costs by applying one of two silicide barriers to one dual stress liner.;CONSTITUTION: In a fabrication method of a semiconductor device, a gate electrode(110) and source/drain regions(104,106) are formed on a first MOS area and a second MOS area opposite to the first MOS area. A silicide barrier is formed on the second MOS area while exposing the first MOS area. A first metal silicide(108) is formed on the gate electrode and a source/drain region of the first MOS area. A first stress(124) is formed on the first MOS area, and a second metal silicide is formed on a gate electrode and a source/drain region of an exposed second MOS area. A second stress liner(126) is formed on the second MOS area in which the second metal silicide is formed.;COPYRIGHT KIPO 2010
机译:目的:提供一种半导体器件的制造方法,以通过将两个硅化物阻挡层之一应用于一个双重应力衬垫来简化工艺,并减少时间和成本。;构成:在半导体器件的制造方法中,栅电极(110) )和源/漏区(104,106)形成在第一MOS区和与第一MOS区相对的第二MOS区上。在第二MOS区域上形成硅化物阻挡层,同时暴露第一MOS区域。在第一MOS区的栅电极和源/漏区上形成第一金属硅化物(108)。在第一MOS区域上形成第一应力(124),并且在暴露的第二MOS区域的栅电极和源极/漏极区域上形成第二金属硅化物。在形成第二金属硅化物的第二MOS区域上形成第二应力衬层(126)。COPYRIGHTKIPO 2010

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