首页> 外国专利> SEMICONDUCTOR DEVICE HAVING A RECESS GATE AND AN ISOLATION STRUCTURE AND A METHOD FOR FABRICATING THE SAME, CAPABLE OF PREVENTING LEAKAGE CURRENT CAUSED BY LOCAL CONCENTRATION OF VOLTAGE

SEMICONDUCTOR DEVICE HAVING A RECESS GATE AND AN ISOLATION STRUCTURE AND A METHOD FOR FABRICATING THE SAME, CAPABLE OF PREVENTING LEAKAGE CURRENT CAUSED BY LOCAL CONCENTRATION OF VOLTAGE

机译:具有闸门和隔离结构的半导体装置以及一种制造该装置的方法,能够防止由局部电压集中引起的漏电流

摘要

PURPOSE: A semiconductor device having a recess gate and an isolation structure and a method for fabricating the same are provided to restrain degradation of performance characteristic of a transistor by a tensile stress by implementing shallow trench isolation structure using a SOD(Spin-On Dielectric) layer.;CONSTITUTION: A part of an active area(101) of a semiconductor substrate is etched selectively and a recess groove is formed. A trench(103) is formed by selectively etching an element isolation region of a semiconductor substrate establishing an active area. A first spin-on dielectric layer(411) partially fills the trench lower than the bottom portion of the recess groove is formed. A second spin-on dielectric layer(450) filling the trench on the first spin-on dielectric layer is formed. A gate(620) of the transistor filling the recess groove is formed.;COPYRIGHT KIPO 2010
机译:目的:提供一种具有凹槽栅极和隔离结构的半导体器件及其制造方法,以通过使用SOD(旋涂电介质)实现浅沟槽隔离结构来抑制由于拉应力而引起的晶体管性能特性的下降。组成:选择性地蚀刻半导体衬底的有源区(101)的一部分,并形成凹槽。通过选择性地蚀刻建立有源区的半导体衬底的元件隔离区域来形成沟槽(103)。第一旋涂电介质层(411)部分地填充低于形成的凹槽的底部的沟槽。形成填充在第一自旋介电层上的沟槽的第二自旋介电层(450)。形成填充凹槽的晶体管的栅极(620)。;COPYRIGHT KIPO 2010

著录项

  • 公开/公告号KR20100036099A

    专利类型

  • 公开/公告日2010-04-07

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20080095555

  • 发明设计人 EUN BYUNG SOO;

    申请日2008-09-29

  • 分类号H01L21/336;H01L21/76;

  • 国家 KR

  • 入库时间 2022-08-21 18:33:02

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