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On-chip debug emulator, debugging method, and microcomputer

机译:片上调试仿真器,调试方法和微计算机

摘要

An on-chip debug emulator is capable of connecting to the target device and the host device for remotely debugging the program in the target device. The on-chip debug emulator contains a debug communication control unit. This debug communication control unit contains a plurality of serial communication circuits, the plurality of serial communication circuits are commonly provided with a clock signal. The debug communication control unit controls communications with the target device based on commands output from the host device. Each of The plurality of serial communication circuits contains a data buffer and serially transmits data stored in the data buffer to and from the target device while synchronized with the clock signal. Namely, the plurality of serial communication circuits communicate in parallel while operating synchronized with the same clock. The on-chip debug emulator can in this way be made utilizing a low-cost microcomputer not containing any parallel communication circuits.
机译:片上调试仿真器能够连接到目标设备和主机设备,以远程调试目标设备中的程序。片上调试仿真器包含一个调试通信控制单元。该调试通信控制单元包括多个串行通信电路,该多个串行通信电路通常被提供有时钟信号。调试通信控制单元基于从主机设备输出的命令来控制与目标设备的通信。多个串行通信电路中的每一个都包含数据缓冲器,并且在与时钟信号同步的同时,将存储在数据缓冲器中的数据与目标装置串行地发送和发送。即,多个串行通信电路在与同一时钟同步地工作的同时并行通信。可以通过不包含任何并行通信电路的低成本微型计算机来制作片上调试仿真器。

著录项

  • 公开/公告号US7979745B2

    专利类型

  • 公开/公告日2011-07-12

    原文格式PDF

  • 申请/专利权人 TAKAHIRO MORODA;

    申请/专利号US20080076064

  • 发明设计人 TAKAHIRO MORODA;

    申请日2008-03-13

  • 分类号G06F11/24;

  • 国家 US

  • 入库时间 2022-08-21 18:11:42

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